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Inline Memory Encryption (IME) Security Module for DDR/LPDDR
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Nios II Soft IP Processor for Safety Critical Applications
NIOSII_SC soft IP Processor is the safety critical version of the of the Nios II processor targeting airborne electronic applications
The design assurance strategy of NIOSII_SC is elaborated in accordance with the DO-254 recommendations for DAL A, particularly on the appendix B (specific to complex components in DAL A/B) which describes recommendations for additional design assurance.
The NIOSII_SC soft IP Processor is the best solution to overcome safety issues when using COTS microprocessors in avionics applications. These issues are detailed in the document "Microprocessor Evaluations for Safety-Critical, Real-Time Applicaions: Authority for Expenditure No. 43 Phase 1 Report" issued by the Federal Aviation Administration (FAA).
The design assurance strategy of NIOSII_SC is elaborated in accordance with the DO-254 recommendations for DAL A, particularly on the appendix B (specific to complex components in DAL A/B) which describes recommendations for additional design assurance.
The NIOSII_SC soft IP Processor is the best solution to overcome safety issues when using COTS microprocessors in avionics applications. These issues are detailed in the document "Microprocessor Evaluations for Safety-Critical, Real-Time Applicaions: Authority for Expenditure No. 43 Phase 1 Report" issued by the Federal Aviation Administration (FAA).
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