55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
Numerically Controlled Oscillator
Lattice provides a parameterizable NCO IP core that supports multiple channels and a Quadrature Amplitude Modulation (QAM) mode, in addition to other usual configurations. The resource utilization and performance trade-off can be tuned by configuring different parameters of the IP core to obtain the optimal Spurious Free Dynamic Range (SFDR) result. The Lattice NCO core offers a variety of memory reduction schemes and mechanisms for SFDR improvement.
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Block Diagram of the Numerically Controlled Oscillator IP Core
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