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Phase Locked Loop (PLL) Macro
The PLL consist of the PLL loop, lock detect circuit and 9 output counters. The delta sigma modulator
& spread-spectrum clock generation logic is placed in the core (PLL wrapper) and can be removed if
fractional division is not needed.
& spread-spectrum clock generation logic is placed in the core (PLL wrapper) and can be removed if
fractional division is not needed.
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