PHY Layer IP Core for 1394b
At the physical layer, the core is built for connecting to FPGA/ASIC embedded SERDES, discrete SERDES parts, or general purpose IO. The Link Layer interface of the core provides the industry standard PHY-Link interface. This PHY-Link interface connects directly to Link Layer IP cores from New Wave DV, to discrete Link Layer integrated circuits, or to custom logic developed by the end user.
This core is targeted towards applications in aerospace and industrial vision, and has been used on a wide range of parts at varying operating rates. The core comes with test-benches and example code, making design integration a straightforward task.
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