The Innosilicon’s high performance PLL is a high speed, low jitter frequency synthesizer and developed as an IP block to reduce time to market, risk and cost in the development of AFE (Analog Front-End) design. It can generate stable high-speed clock from an ultra-wide input clock. With excellent supply noise immunity, the PLL is ideal for using in noisy mixed signal SoC environments. This PLL integrates a Phase Frequency Detector (PFD), a Low Pass Filter (LPF), a Voltage Controlled Oscillator (VCO) and other associated circuits. All fundamental building blocks as well as fully programmable dividers are integrated in the core.