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Aeonic Generate Digital PLL for multi-instance, core logic clocking
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Power-On Reset (POR) - Flexible Threshold (down to 0.9V), Low Power (6µA) - XFAB 0.35 μm
This macro-cell is a low consumption Power-On Reset (POR) core designed for X-FAB 0.35µm XH035 CMOS technology. The core has a voltage sense, an internal current bias circuit and two configurable assertion delays (default are > 1µs and > 20µs). The threshold sensing voltage can be configured from 0.9V to 5.5V (default is 3.0V). A hysteresis of 100mV is added to avoid false reset glitches in noisy supplies. The core is easily retargeted to any other CMOS technology with R-poly devices.
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