MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
RGMII IO Pad Set
View RGMII IO Pad Set full description to...
- see the entire RGMII IO Pad Set datasheet
- get in contact with RGMII IO Pad Set Supplier
ESD IP
- on-chip ESD protection
- High speed 3.3V I/0 Library with 8kV ESD protection in TPSCo 65nm technology
- IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline GlobalFoundries and multi-foundry technologies
- 5V ESD Clamp in GlobalFoundries 180nm LPe
- 5.5V ESD Clamp Cell and 7V HV ESD Protection