The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS SATA 3 HOST XZ7 IP is compliant with Serial ATA III specification and signaling rate is 1.5Gbps and scalable 6Gbs. The LDS SATA 3 HOST XZ7 IP is fully synchronous with system frequency (Clock_sys) at 37.5MHz in case of 1.5Gbps speed selection and 75MHz in case of 3Gbs speed selection and 150MHz in case of 6Gbs speed selection. The source code format is available for ease of customization. The customization can be done by Logic Design Solutions and DO254 documentation is available on request.
View
SATA 3 Host Controller on ZYNQ
full description to...
see the entire
SATA 3 Host Controller on ZYNQ
datasheet
get in contact with
SATA 3 Host Controller on ZYNQ
Supplier
Block Diagram of the SATA 3 Host Controller on ZYNQ IP Core
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.