PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations
Root of Trust eSecure module for SoC security
MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
TSMC 6nm (6FF) 3.3V GPIO
Interview with Xiphera CEO - Adapting to Market Changes
Semiconductor Industry Faces a Seismic Shift
Andes Technology and proteanTecs Partner to Bring Performance and Reliability Monitoring to RISC-V Cores
Why RISC-V is a viable option for safety-critical applications
Dimensioning in 3D space: Object Volumetric Measurement by Leveraging Depth Camera-based Reconstruction on NVIDIA Edge devices
Post-Quantum Cryptography - Securing Semiconductors in a Post-Quantum World
8051s in Modern Systems: Interfacing to AMBA Buses
What should you consider when building an SoC?
Hardware Security Module (GRHSM) IP Core: Enhancing Security in Critical Systems
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