English
You are here:
SC9 Standard Cell Library - TSMC 130 nm CL013LP
ARM® Logic IP solutions are the ideal choice for advanced, deep submicron SoC designs. The Standard Cell Libraries are complemented by Power Management Kit and ECO Kit extensions, delivering optimal performance, power and area results.
View SC9 Standard Cell Library - TSMC 130 nm CL013LP full description to...
- see the entire SC9 Standard Cell Library - TSMC 130 nm CL013LP datasheet
- get in contact with SC9 Standard Cell Library - TSMC 130 nm CL013LP Supplier
Logic IP IP
- Aeonic Generate Digital PLL for multi-instance, core logic clocking
- H.264 Baseline Encoder with compressed reference frame store
- Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
- Duet Package of Embedded Memories and Logic Libraries for Huali (55nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm, N7, N6, N5, N4P)