SC9MC Standard Cell Library - Samsung 28 nm CMOS28LP
View SC9MC Standard Cell Library - Samsung 28 nm CMOS28LP full description to...
- see the entire SC9MC Standard Cell Library - Samsung 28 nm CMOS28LP datasheet
- get in contact with SC9MC Standard Cell Library - Samsung 28 nm CMOS28LP Supplier
Logic IP IP
- Aeonic Generate Digital PLL for multi-instance, core logic clocking
- H.264 Baseline Encoder with compressed reference frame store
- Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
- Duet Package of Embedded Memories and Logic Libraries for Huali (55nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm, N7, N6, N5, N4P)