SERDES PHY IP

The Multi-protocol SerDes (MPS) PHY is a comprehensive PAM-4 solution that provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications. The SerDes IP has supported data rates from 1.25G to 10.3125Gbps including XFI, SFI, 10GBASE-Kr, CEI, XAUI, USXGMII, QSGMII, and SGMI. The SerDes PHY is designed to meet the power efficiency and performance requirements of next-generation, high-speed wireline, and wireless 5G infrastructure applications. With the help of both the TX and RX equalization techniques, the SerDes IP can meet the needs of various channel conditions. It is designed with a system-oriented approach, taking the interface, interconnect and channel into account when optimizing performance and features to maximize flexibility in today’s most challenging system environments and applications. This makes the PHY ideal for many long-reach, copper and backplane system environments.

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