This FFT circuit employs unique architectural characteristics providing functionality and capabilities not possible with other FFT implementations. Consequently, floating-point capability is obtained with the LUT/register and memory resources usually associated with lower precision fixed-point designs. For example a 1024-point design uses only ~6662 ALM's vs ~12883 for Altera's equivalent FFT, yet precision is x2 better. Additionally, the locality, simplicity and regularity of the processing core keeps interconnect delays lower than cell delays, leading to reduced power dissipation.