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SMIC 0.25um 2.5V APLL
The present IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run up to 280MHz. By setting different values of DM[4:0] and DN[6:0] according to the different REFIN frequency, BAKO will be locked at the rising edge of REFIN and the output frequency (CKO) will be locked at the multiples of the input frequency.
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