Streaming pipelined FFT

A highly efficient pipelined radix-2 squared FFT. Ported to both ASIC and FPGA technology and achieving a very high clock speed with minimal logic and memory.

Also available is a variant with single bit width growth per stage which does not require per-sample exponents.

EnSilica has a comprehensive range of FFT IP cores, these cores can be configured to replace the AMD FFT LogiCORE™ IP or FFT Intel® FPGA IP Core when migrating an FPGA design to ASIC technology.

• see the entire Streaming pipelined FFT datasheet
• get in contact with Streaming pipelined FFT Supplier