System Controller

Features

• Designed for ASIC and PLD implementations.
• Fully static design with edge triggered flip-flops.
• Supports ARM, I960, PowerPC and SH2-SH4 microprocessors.
• Fully integrated single chip design provide complete system level functions for all external data access.
• Replaces multiple discrete devices on the system.
• Flexible design adaptive to different system requirements.
• Two different clock domains for CPU and PCI bus interface.
• Supports concurrent data transfer between CPU, System memory, DMA and PCI bus.
• System control register distributed in each functional blocks.
• On-chip connection to user-defined logic blocks.
• PCI spec 2.2 compliant.
• Supports industrial standard SDRAMs.