Time aligned Signal Generator core
It allows single, multi (configurable) and continuous pulse generation with configurable polarity, start time, interval and duty cycle.
The IP core comes with a Linux Driver
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Block Diagram of the Time aligned Signal Generator core IP Core

Signal Generator IP
- TSMC 12 FFC 4GHz Clock Generator / Clock Synthersizer, PLL (Fractional / Integer)
- TSMC 12 FFC 8GHz Clock Generator / Clock Synthersizer, PLL (Fractional / Integer)
- High performance 1.8V reference current and voltage generator
- 32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
- 32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
- 32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter