Timer IP

TIMER is used to generate delays, signals with timing characteristics and measure the time between signal edges, compatible with standard protocol of TIMER specification. Through its TIMER compatibility, it provides a simple interface to a wide range of low-cost devices. TIMER IIP is proven in FPGA environment.The host interface of the TIMER can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.

• see the entire Timer IP datasheet
• get in contact with Timer IP Supplier