English
You are here:
TSMC CLN65GP 65nm General Purpose PLL - 260MHz-1300MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divider in the internal feedback path, and a 1-16 divider at the output. The outputs are 50% duty cycle for all output divider values. It delivers optimal jitter performance over all multiplication settings and is suitable for system clock, DDR and general purpose applications where small size, low power and low cost are important.
View TSMC CLN65GP 65nm General Purpose PLL - 260MHz-1300MHz full description to...
- see the entire TSMC CLN65GP 65nm General Purpose PLL - 260MHz-1300MHz datasheet
- get in contact with TSMC CLN65GP 65nm General Purpose PLL - 260MHz-1300MHz Supplier
General Purpose PLL IP
- TSMC CLN7FF 7nm General Purpose PLL - 400MHz-2000MHz
- TSMC CLN28HPC 28nm General Purpose PLL - 350MHz-1750MHz
- IGAPLLV03A, TSMC CLN16FF+ General Purpose PLL
- IGAPLLV09A, TSMC CLN12FFC/CLN16FFC General purpose PLL
- General Purpose Fractional-N PLL in GlobalFoundries 22FDX
- General Purpose Fractional-N PLL in TMSC 16FFC