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Two-Wire slave IP for use with the Mentor M8051W and M8051EW
The M2WIS adds two-wire slave capability to M8051W and M8051EW designs. Use of standard synchronous design methodology makes this core simple to integrate into both ASIC and FPGA SoC designs.
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Block Diagram of the Two-Wire slave IP for use with the Mentor M8051W and M8051EW
8051 IP
- Pipelined High Performance Microcontroller
- Super-Fast 8051 Microcontroller Core with Configurable Features and Peripherals
- High Performance 8051 Compatible CPU Core
- Instruction Set Compatible with the 8051 8-bit Microcontroller Architecture
- High Performance / Low Power Microcontroller Core
- Intel™ 8051 8-bit Microcontroller