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UCIe Die-to-Die Chiplet Controller
Introducing OPENEDGES’ Universal Chiplet Interconnect Express (UCIe) Controller IP, OUC, designed to transform the semiconductor landscape with innovative multi-chiplet designs. This UCIe chiplet brings highly
customizable, package-level integration with die-to-die interconnect and protocol connections, creating an interoperable, multi-vendor ecosystem, and establishing a new industry standard for universal interconnect at the
package level.
Building on OPENEDGES’ extensive expertise in interconnect IP development, the UCIe Controller IP is a highly configurable and customizable UCIe 1.1 compliant die-to-die controller. It extends on-chip AXI interconnections to multi-die connections, providing an advanced solution for multi-die connectivity across various applications. The controller uses flits, which are flow control units that are both reliable and latency-optimized. In addition, OUC ensures that the receiver buffer does not overflow at the receiver end. With its well-defined AXI packet structure, the OUC seamlessly matches AXI parameters with its link partner, ensuring smooth format matching and communication even with different AXI parameters. OUC matches the protocol using padding and cropping with default operation rules defined in AXI.
Designed for convenient multi-die communications, the OUC works seamlessly with OPENEDGES’ on-chip interconnect IP, OIC. Together, OIC and OUC make it easy to extend on-chip interconnects to form multi-chiplet interconnects, utilizing OIC's ActiveQoS and efficient bandwidth transfer capabilities across multiple chips, providing a practical and effective solution for today’s semiconductor needs.
customizable, package-level integration with die-to-die interconnect and protocol connections, creating an interoperable, multi-vendor ecosystem, and establishing a new industry standard for universal interconnect at the
package level.
Building on OPENEDGES’ extensive expertise in interconnect IP development, the UCIe Controller IP is a highly configurable and customizable UCIe 1.1 compliant die-to-die controller. It extends on-chip AXI interconnections to multi-die connections, providing an advanced solution for multi-die connectivity across various applications. The controller uses flits, which are flow control units that are both reliable and latency-optimized. In addition, OUC ensures that the receiver buffer does not overflow at the receiver end. With its well-defined AXI packet structure, the OUC seamlessly matches AXI parameters with its link partner, ensuring smooth format matching and communication even with different AXI parameters. OUC matches the protocol using padding and cropping with default operation rules defined in AXI.
Designed for convenient multi-die communications, the OUC works seamlessly with OPENEDGES’ on-chip interconnect IP, OIC. Together, OIC and OUC make it easy to extend on-chip interconnects to form multi-chiplet interconnects, utilizing OIC's ActiveQoS and efficient bandwidth transfer capabilities across multiple chips, providing a practical and effective solution for today’s semiconductor needs.
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Block Diagram of the UCIe Die-to-Die Chiplet Controller IP Core
