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UCIe Die-to-Die Controller
GammaCORE is a highly configurable and customizable Universal Chiplet Interconnect Express (UCle™) Die-to-Die Controller IP implementing the latest UCIe 1.1 specification and supporting UCIe Streaming protocol applications.
With Alphawave’s AresCORE D2D PHY IP, GammaCORE provides the complete UCIe solution for an open and robust chiplet ecosystem.
GammaCORE UCIe D2D Controller IP enables multi-die applications, such as the connection of I/O chiplets to a main die, accelerator die to a processor die, multi-die packet processors, multi-die Ethernet switches, etc.
GammaCORE Controller IP core consists of the Streaming Protocol Layer, to extend the SoC interface across the UCIe link, and the Adapter Layer, to provide a reliable end-to-end link.
On the UCIe link side, GammaCORE provides seamless connection to the AresCORE UCIe D2D PHY IP through the RDI interface. On the system side, GammaCORE connects to one or multiple internal SoC interfaces.
With Alphawave’s AresCORE D2D PHY IP, GammaCORE provides the complete UCIe solution for an open and robust chiplet ecosystem.
GammaCORE UCIe D2D Controller IP enables multi-die applications, such as the connection of I/O chiplets to a main die, accelerator die to a processor die, multi-die packet processors, multi-die Ethernet switches, etc.
GammaCORE Controller IP core consists of the Streaming Protocol Layer, to extend the SoC interface across the UCIe link, and the Adapter Layer, to provide a reliable end-to-end link.
On the UCIe link side, GammaCORE provides seamless connection to the AresCORE UCIe D2D PHY IP through the RDI interface. On the system side, GammaCORE connects to one or multiple internal SoC interfaces.
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Block Diagram of the UCIe Die-to-Die Controller IP Core
