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TSMC 5nm (N5) 1.2V/1.8V/2.5V GPIO Libraries, multiple metalstacks
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UFSHCI 4.0
The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platforms. It provides command sets and device management functions for UFS host applications, as well as manages data transfer between the host SW and UFS devices.
The UFSHCI 4.0 IP is compliant with JEDEC UFSHCI 4.0 specification, which includes the Multi-Circular Queue (MCQ) feature and support for 2DW PRDT to enhance host performance. The UFSHCI IP also provides the AES-128 engine (optional) to meet customers’ security demands.
The UFSHCI IP can be combined with UniPro IP and M-PHY IP to provide a comprehensive UFS host solution, enabling customers to easily integrate it into their applications and accelerate the time-to-market for SoC designs.
The UFSHCI 4.0 IP is compliant with JEDEC UFSHCI 4.0 specification, which includes the Multi-Circular Queue (MCQ) feature and support for 2DW PRDT to enhance host performance. The UFSHCI IP also provides the AES-128 engine (optional) to meet customers’ security demands.
The UFSHCI IP can be combined with UniPro IP and M-PHY IP to provide a comprehensive UFS host solution, enabling customers to easily integrate it into their applications and accelerate the time-to-market for SoC designs.
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