USB 2.0/1.1 PHY (6nm, 7nm, 12nm, 16nm, 22nm, 28nm, 40nm, 55nm, 65nm, 90nm)

USB 2.0 PHY
M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power consumption. M31 utilizes a whole new design architecture to implement the USB 2.0 IP without sacrificing the performance associated with USB 2.0. The USB 2.0 IP is not only suitable for USB peripherals, but also an optimized solution for SOCs that desire multiple USB ports.

USB 1.1 PHY
M31 provides customers with a unique USB 1.1 PHY IP for IoT applications. The USB 1.1 PHY IP integrates a semi-digital PLL, which supports clock inputs as low as 32.768KHz. The USB 1.1 PHY IP not only supports standard USB 1.1 features, but also provides multiple clock outputs from 48MHz to 240MHz. It’s ideal for IOT or wearable devices that require basic USB functionalities.

• see the entire USB 2.0/1.1 PHY (6nm, 7nm, 12nm, 16nm, 22nm, 28nm, 40nm, 55nm, 65nm, 90nm) datasheet
• get in contact with USB 2.0/1.1 PHY (6nm, 7nm, 12nm, 16nm, 22nm, 28nm, 40nm, 55nm, 65nm, 90nm) Supplier