The combined PHY complies with USB (USB 3.0, USB 2.0), PCIe (Peripheral Component Interconnect Express), Serial ATA (SATA 3.0 Specification), and PIPE interface protocol (USB High-speed and Full speed). Reduced power usage is made possible by supporting extra internal power gating, reference clock control, and PLL control. Because of the versatility of the previously described low power mode choice, the PHY is also particularly beneficial for a variety of situations under different considerations of power consumption.