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USB2.0 PHY, 8-bit or a 16-bit parallel interface, remaining backward compatible with USB1.1 legacy protocol at 12Mbps
KA13UGUSB20ST001 is USB2.0 physical layer transceiver (PHY) integrated circuits. The PHY can be configured for either an 8-bit or a 16-bit parallel interface, which complies with the USB Transceiver Macrocell Interface (UTMI) specification. It supports 480bps transfer rate, while remaining backward compatible with USB1.1 legacy protocol at 12Mbps.
It includes the following blocks:
* Analog Driver and Receiver
* PLL generate the 480MHz clock
* Clock and Data Recovery
* NRZI encoder/decoder
* Serialize / De-serialize
* Control state machine
* Integrated pull up and self-calibrated termination resistors and switches
It includes the following blocks:
* Analog Driver and Receiver
* PLL generate the 480MHz clock
* Clock and Data Recovery
* NRZI encoder/decoder
* Serialize / De-serialize
* Control state machine
* Integrated pull up and self-calibrated termination resistors and switches
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Block Diagram of the USB2.0 PHY, 8-bit or a 16-bit parallel interface, remaining backward compatible with USB1.1 legacy protocol at 12Mbps
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