English
30mA, Capless High PSRR LDO Regulator for RF and Analog Applications in TSMC 28nm
You are here:
USB3.2 Retimer Controller
MosChip USB3.2 Retimer softcore is designed for use USB Port/Cable Retimer applications with USB SuperSpeedPlus/SuperSpeed link operations The IP has been verified in simulation and is synthesis clean for FPGA implementations. The core is highly power efficient for port or cable retimer applications
View USB3.2 Retimer Controller full description to...
- see the entire USB3.2 Retimer Controller datasheet
- get in contact with USB3.2 Retimer Controller Supplier
Block Diagram of the USB3.2 Retimer Controller IP Core
USB IP IP
- HDCP 2.3 Embedded Security Modules on DisplayPort/USB Type-C
- USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
- USB 2.0 PHY GlobalFoundaries 12nm, 22nm, 28nm, 40nm
- Multi-protocol SerDes PMA
- Complete USB Type-C Power Delivery PHY, RTL, and Software
- USB 2.0 OTG High / Full / Low- Speed Dual Role IP Core