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VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13¦Ìm Logic 1P8M Salicide 1.2/2.5V process. This library supports Device Under Pad (DUP). This library includes analog I/O cell part and digital I/O cell part, and the digital I/O cells can take 3.3V tolerance and work with configurable and variable driving strength between 2mA - 24mA. This library supports Inline I/O pad.
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SMIC 0.13um 1.2V/2.5V DUPIO_01 Library IP
- SMIC 0.13um General Process, 1.2V/2.5V Standard I/O Library
- SMIC 0.13um General Process, 1.2V/2.5V Standard Cell Library
- SMIC 0.13um High Vt Process, 1.2V/2.5V standard cell Library
- SMIC 0.13um 1.2V/2.5V ANALOGIO_05 IO Library
- VeriSilicon SMIC 0.13um 1.2V/2.5V ANALOGIO_DUP_05 IO Library
- VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library