English
400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
You are here:
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.18¦Ìm Logic 1P6M Salicide 1.8/3.3V process. This library provides 5V analog IO pads. This library supports Device Under Pad (DUP).
View VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library full description to...
- see the entire VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library datasheet
- get in contact with VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library Supplier