English
You are here:
xSPI NOR Flash controller
xSPI-NFC is JEDEC xSPI compliant NOR Flash controller IP supporting devices from various vendors with XIP and Auto-boot support. The IP also has Continuous burst support for higher throughput. It can also function as a memory-mapped “simple SPI/Dual/Quad/Octa” Flash Controller, thus compatible with legacy devices also. The controller architecture is SoC friendly and supports multiple chip-selects.
Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. As new age lower-end microcontrollers (MCUs) continue to shrink in die size, their internal memory is very limited. They need a low pin count, high-performance memory subsystem. Similarly, there are consumer applications that are space-constrained and require instant-on, such as digital still cameras, DSLRs and home automation. So, OEMs are looking for simple, flexible, high performance and low-energy memory solutions with backward compatibility to meet their needs. The major NOR Flash memory device vendors responded with such devices by expanding from current Quad I/O to OctaFlash Memory (8 I/O) resulted in substantial increase in Serial NOR Flash throughput.
For example, the new-generation OctaFlash by Macronix is built on Serial Peripheral Interface (SPI) and command set, providing extendable I/O capability(x8). The data transfer rate has been increased from 100MB/s of Quad I/O Serial NOR Flash to 400MB/s, claims Macronix
This resulted in lower-density memory subsystem interfaces trending toward x4/x8 SPI (xSPI) interfaces and performance growing exponentially. Mobiveil's approach on this emerging scenario results in adapting to JEDEC xSPI compliant NOR Flash controller supporting devices from various vendors. The IP can function as simple 'SP! Flash Controller' or, 'Quad-SPI Flash Controller or Octa-SPI Flash Controller' or 'Dual QSPI Controller', thus compatible with legacy devices also. The controller architecture is SoC friendly and supports multiple chip-selects.
Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. As new age lower-end microcontrollers (MCUs) continue to shrink in die size, their internal memory is very limited. They need a low pin count, high-performance memory subsystem. Similarly, there are consumer applications that are space-constrained and require instant-on, such as digital still cameras, DSLRs and home automation. So, OEMs are looking for simple, flexible, high performance and low-energy memory solutions with backward compatibility to meet their needs. The major NOR Flash memory device vendors responded with such devices by expanding from current Quad I/O to OctaFlash Memory (8 I/O) resulted in substantial increase in Serial NOR Flash throughput.
For example, the new-generation OctaFlash by Macronix is built on Serial Peripheral Interface (SPI) and command set, providing extendable I/O capability(x8). The data transfer rate has been increased from 100MB/s of Quad I/O Serial NOR Flash to 400MB/s, claims Macronix
This resulted in lower-density memory subsystem interfaces trending toward x4/x8 SPI (xSPI) interfaces and performance growing exponentially. Mobiveil's approach on this emerging scenario results in adapting to JEDEC xSPI compliant NOR Flash controller supporting devices from various vendors. The IP can function as simple 'SP! Flash Controller' or, 'Quad-SPI Flash Controller or Octa-SPI Flash Controller' or 'Dual QSPI Controller', thus compatible with legacy devices also. The controller architecture is SoC friendly and supports multiple chip-selects.
View xSPI NOR Flash controller full description to...
- see the entire xSPI NOR Flash controller datasheet
- get in contact with xSPI NOR Flash controller Supplier
Block Diagram of the xSPI NOR Flash controller IP Core
