400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Zynq-7000 Processing System IP
The Processing System IP is the software interface around the Zynq-7000 Processing System. the Zynq-7000 family consists of a system-on-chip (SoC) style integrated processing system (PS) and a Programmable Logic (PL) unit, providing an extensible and flexible SoC solution on a single die.
The Processing System IP Wrapper acts as a logic connection between the PS and the PL while assisting you to integrate custom and embedded IPs with the processing system using the Vivado® IP integrator.
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