Our company offers a highly configurable and adaptable USB 2.0 OTG controller IP core, suitable for a wide range of applications. This controller adheres to the latest industry standards (USB ...

The Multistandard SerDes is available in TSMC 65nm and GF28SLP process node to support wide range of standards like PCI, SATA, XFI etc.

The Innosilicon 25G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet, the PHY has been configured to support ...

The Innosilicon 12.5G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 12.5Gbps within a single lane. For this particular datasheet, the PHY has been configured to ...

M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5.0 and UTMI+ specifications. The USB4 IP ...

USB 3.0 Dual Mode Controller IP Core uses a high performance DMA engine based on the xHCI specification and presenting either an AHB or AXI interface, this controller offers host and device ...

We provide highly configurable and scalable USB 3.0 host/device/dual mode controller IP Core for a wide range of applications. The USB 3.0 controller is designed for compliance with USB3.0 specification, ...

USB 3.1 Device controller is a highly configurable core and implements the USB 3.1 Device functionality that can be interfaced with third party USB 3.1 PHY’s. USB3.1 Device controller core ...

USB 3.0 OTG Controller IP is based on the latest USB 3.0 specification from USB Implementer Forum (USBIF) and is compatible with the latest xHCI 1.1 specification. It supports SuperSpeed (5Gbps) ...

USB 1.1 Device Controller IP is based on the latest USB 1.1 specification from USB Implementer Forum (USB-IF) and is compatible with the latest xHCI 1.1 specification. It supports FullSpeed ...

The USB2.0 PHY IP is an entire physical layer (PHY) IP solution built for high performance and low power consumption. For usage with either hosts, devices, or OTG function controllers, the USB2.0 ...

We provide highly configurable and scalable USB 2.0 host/ device/dual-mode controller IP Cores for a wide range of applications. The USB 2.0 controller is designed for compliance with USB2.0 ...

We provide highly configurable and scalable USB 3.1 host/device/dualmode controller IP Cores for a wide range of applications. The USB3.0 host controller is a highly integrated and cost-effective ...

We provide highly configurable USB 2.0 device controller IP Cores. Our host, device, and hub offerings are silicon realized and USB-IF certified by our customers. We provide highly configurable ...

A Universal Serial Bus (USB) transceiver which is provided for peripheral devices. The PHY is compliant with the USB 3.0 (USB SuperSpeed), USB 2.0 PIPE and UTMI specifications. The USB3.0 PHY ...

The USB2.0 PHY IP is an entire physical layer (PHY) IP solution built for high performance and low power consumption. For usage with either hosts, devices, or OTG function controllers, the USB2.0 ...

The USB2.0 PHY IP is a complete physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 transceiver is implemented by the USB2.0 ...

The USB2.0 PHY IP is a comprehensive physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 transceiver, which can be used with ...

The USB2.0 PHY IP is a comprehensive physical layer (PHY) IP solution created for exceptional performance and low power consumption. The High-Speed USB 2.0 transceiver, which can be used with ...

The USB 2.0 PHY IP Core is a complete solution for the physical layer (PHY) that prioritizes both high performance and low power consumption. This versatile IP core offers a High-Speed USB 2.0 ...

A Universal Serial Bus (USB) transceiver is available for peripheral devices. The PHY complies with the USB 3.0 (USB SuperSpeed), USB 2.0 PIPE, and UTMI specifications. Without sacrificing speed ...

For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered. The PHY complies with the UTMI, USB 2.0 PIPE, and USB 3.0 (USB SuperSpeed) requirements. The USB3.0 PHY IP transceiver ...

The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for excellent performance and low power consumption. The High-Speed USB 2.0 transceiver for usage with hosts, devices, or ...

The USB 2.0 PHY IP Core offers a complete physical layer (PHY) solution for high performance and low power. It implements a High-Speed USB 2.0 transceiver compatible with host, device, and On-The-Go ...

For peripheral devices, there is a Universal Serial Bus (USB) transceiver available. The USB 3.0 (USB SuperSpeed), USB 2.0 PIPE, and UTMI standards are all met by the PHY. The USB3.0 PHY IP ...

USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.0 and all associated ECN’s. USB 3.1 Host controller is architected ...

Low-power, long-reach, multi-protocol PHY for PCIe 4.0 The Cadence® 10Gbps multi-protocol PHY IP provides a flexible PHY IP that simplifies the design process without compromising performance, ...

The Renesas PCIe 4.0 Dual Mode Link Controller IP is compliant with the "PCI Express (PCIe) 4.0 Base Specification". This IP supports the major functions required as PCIe link IP for embedded ...

USB 5G,10G, 20G and 4.0 Device router controller is a highly configurable core and implements the USB device functionality and can be interfaced with third party USB PHY’s. The core can ...

1 Testimonial
P F Lin, CEO, MOAI Electronics Corp

YEESTOR’s NFC (ESNFC) IP is a NAND Flash Controller for accessing user data from NAND Flash chips. It is designed with scalability in mind and provides standard AXI interface for the ease ...

(PCIe 3.1) x4 PHY IP supports PCIe3.1 transmission. This is compliant with PCIe Rev3 Base Specification with support of PIPE 4.3 interface spec. Input clock frequency as 25Mhz, the output data ...

PCIe Gen 3.1 transmission is supported by (PCIe 3.1) x4 PHY IP. With compatibility for PIPE 4.3 interface spec, this complies with PCIe Rev3 Base Specification. 2.5 Gbps, 5.0 Gbps, 8.0 Gbps, ...

The multi protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 4.0, 3.0, 2.0 Base Specification with support of PIPE interface spec, and JESD204B ...

Universal Flash Storage (UFS) is a simple, high performance, mass storage device with a serial line interface. UFS is designed to be the most advanced specification for flash memory based storage ...

The BLE 4.2 SoC White Box IP solution is the design data base of a fully compliant BLE 4.2 production chip with SW and profiles including Mesh and Audio profiles allowing easy connectivity with ...

The Silicon chip supports BT EDR 1Mbps, 2Mbps, 3Mbps support combines the features and functions needed for all BT Audio solutions. It supports standards and industrial alliance specifications ...

Cadence IP Controller for ONFI NAND and Toggle NAND NAND Flash memory is widely used for data storage in computers and multiple consumer and enterprise applications. It is the basic ...