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New Silicon IP
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MIPI D-PHY Universal IP in UMC 28HPC+
- Supports MIPI Alliance Specification for D-PHY Version 2.5
- Consists of 1 Clock lane and 4 Data lanes
- Embedded, high performance, and highly programmable PLL
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Automotive Interface IP Series
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Ultra-low-power AI/ML processor and accelerator
- Allows complex inference at the very edge, at the sensor, even in battery-operated or energy harvesting devices.
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MIPI D-PHY DSI RX (Receiver) in UMC 22ULP/22ULL
- Supports MIPI Alliance Specification for D-PHY Version 2.5
- Consists of 1 Clock lane and 4 Data lanes
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PCIe 3.0 PHY in Samsung (SF5A
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10MHz to 50MHz fractional-N PLL synthesizer
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Process/Voltage/Temperature Sensor (Supply voltage 1.8V/0.9V)
- UMC 28nm HPC+ technology
- Temperature measurement range -40°C ÷ +125°C
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UMC L28HPCLVT 28nm Ultra PLL - 15MHz-3000MHz
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UMC L28EHVLVT 28nm Ultra PLL - 15MHz-3000MHz
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