UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate Process Ture 3.3V Generic IO Cell Library

UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library

UMC 55nm Embedded Flash and Embedded E2PROM Ultra Low Power Split-Gate Process

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT periphery high density single port SRAM memory compiler.

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT periphery high density single port SRAM memory compiler with row redundancy.

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT+uHVT periphery high density single port SRAM memory compiler.

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT+uHVT periphery high density single port SRAM memory compiler with row redundancy. ...

UMC 55nm embedded flash and embedded e2prom ultra low power split-gate via 1 ROM compiler with well bias

UMC 55nm embedded flash and embedded e2prom ultra low power splite-gate synchronous via1 rom complier with well bias

The circuit is 2-bit ADC with programmable threshold. Least significant bit, calling sign bit, turns to 1 or 0 with changing of differential input signal polarity. Most significant bit, calling ...

The circuit is 2-bit ADC with programmable threshold. Least significant bit, calling sign bit, turns to 1 or 0 with changing of differential input signal polarity. Most significant bit, calling ...

The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3.0 Specification, UniPro v1.8 Specification, and Universal Flash Storage (UFS) v3.0 Specification are ...

The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal ...

eMemory's RRAM IP is a cost-effective embedded Flash solution for both foundries & customers. Only 2~3 additional masks are required, and RRAM gives foundry and customer many advantages such ...

3-level detector for MMC flash storage, VCCA=3.3V, Ivcca=65uA, UMC 0.18um GII Logic process.

Voltage detector for flash protect, UMC 0.18um LL Logic process.

UMC 55 nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate process 1.8V/2.5V/3.3V Multi-Voltage BOAC IO Cell Library.

UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate process 5V Tolerant BOAC IO Cell Library.

MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pin counts along with excellent power efficiency. ...

In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function. M31’s patented BCK (Built-in-Clock, a.k.a. Crystal-less) technology ...

PMU is designed to supply integrated circuits with stable and precise voltage. 055UMC_PMU_01 is a library including RS block and 4 LDOs: LDO1 to supply digital circuits; LDO2 and LDO3 to supply ...