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Xilinx and Open-Silicon HMC Memory Solution
Watch a demonstration of the industry's first available 12.5 Gb/s Hybrid Memory Cube (HMC) interface using the Xilinx Virtex®-7 FPGA. See how this solution provides superior memory bandwidth for your application using HMC technology, Virtex-7 FPGA, and Open-Silicon IP.
Posted on Thursday Apr. 24, 2014
Xilinx Channel
Industry's first Gen3 x 16 PCIe solution built into a programmable device
2:30
Zynq UltraScale+ DDR4 Memory Interfaces at 2667Mbps
3:06
DAVE Embedded Systems: Matrix multiply HLS IP with DAVE Bora kit
2:15
Zynq UltraScale+ MPSoC
2:14
16nm UltraScale+ Family
3:15
Using Advanced Encryption Standard Keys with the Battery-Backed (BBR) RAM
8:10
Integrated Interlaken operating at 150 Gb/s in UltraScale FPGAs
3:43
Low Latency 25G/50G Ethernet MAC Connectivity Solution
0:30
Using Multiple Clock Domains in Vivado IP Integrator
6:52
UltraScale Devices Integrated 100G Ethernet IP Demo
2:43
Industry's first Gen3 x 16 PCIe solution built into a programmable device2:30
Zynq UltraScale+ DDR4 Memory Interfaces at 2667Mbps3:06
DAVE Embedded Systems: Matrix multiply HLS IP with DAVE Bora kit2:15
Zynq UltraScale+ MPSoC2:14
16nm UltraScale+ Family 3:15
Using Advanced Encryption Standard Keys with the Battery-Backed (BBR) RAM 8:10
Integrated Interlaken operating at 150 Gb/s in UltraScale FPGAs 3:43
Low Latency 25G/50G Ethernet MAC Connectivity Solution 0:30
Using Multiple Clock Domains in Vivado IP Integrator 6:52
UltraScale Devices Integrated 100G Ethernet IP Demo 2:43