New DesignWare® USB 2.0 & 3.0 femtoPHY IP: FinFET Silicon Success
View the silicon test results of the new DesignWare USB femtoPHY family. DesignWare USB 2.0 and 3.0 femtoPHYs, available now on leading FinFET process technologies, reduce USB area by 50% compared to previous generations.
Posted on Wednesday Apr. 30, 2014
2:12 Synopsys at IP SoC Santa Clara 2019
3:37 IP That Drives Intelligence
4:22 Congratulations D&R - Aart de Geus, Synopsys Inc.
9:13 IP Solutions for Securing IoT Devices
1:52 DesignWare IP for Embedded Vision, Automotive, FinFET SoCs and more
4:30 Keysight Tests Synopsys DesignWare USB 3.1 IP for Compliance
3:30 What Designers Need to Know About the PCI Express 4.0 Draft 0.7 Specification
4:44 What is an Embedded Vision Processor?
4:27 Introduction to Embedded Vision
3:05