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Zynq UltraScale+ DDR4 Memory Interfaces at 2667Mbps
This video highlights the first member of the UltraScale+ portfolio, the Zynq® UltraScale+™ MPSoC, and shows the robustness of the memory interface system using the DDR4 SDRAM IP in the programmable logic. The video highlights DDR4 first silicon bring-up running at 2667Mbps error free for a 48 hour duration, with low jitter and plenty of margin.
Posted on Friday Oct. 16, 2015
Xilinx Channel
Industry's first Gen3 x 16 PCIe solution built into a programmable device
2:30
DAVE Embedded Systems: Matrix multiply HLS IP with DAVE Bora kit
2:15
Zynq UltraScale+ MPSoC
2:14
16nm UltraScale+ Family
3:15
Using Advanced Encryption Standard Keys with the Battery-Backed (BBR) RAM
8:10
Integrated Interlaken operating at 150 Gb/s in UltraScale FPGAs
3:43
Low Latency 25G/50G Ethernet MAC Connectivity Solution
0:30
Using Multiple Clock Domains in Vivado IP Integrator
6:52
UltraScale Devices Integrated 100G Ethernet IP Demo
2:43
Industry's first Gen3 x 16 PCIe solution built into a programmable device2:30
DAVE Embedded Systems: Matrix multiply HLS IP with DAVE Bora kit2:15
Zynq UltraScale+ MPSoC2:14
16nm UltraScale+ Family 3:15
Using Advanced Encryption Standard Keys with the Battery-Backed (BBR) RAM 8:10
Integrated Interlaken operating at 150 Gb/s in UltraScale FPGAs 3:43
Low Latency 25G/50G Ethernet MAC Connectivity Solution 0:30
Using Multiple Clock Domains in Vivado IP Integrator 6:52
UltraScale Devices Integrated 100G Ethernet IP Demo 2:43