Interconnect Physical Optimization

By Charles Janac, CEO of ArterisIP

IP SoC 2017 Grenoble
December 6th-7th, 2017
Organized by Design and Reuse (D&R)

Posted on Wednesday Dec. 13, 2017

Arteris Channel

Interconnect for AI and Automotive solutions
5:22

Kurt Shuler, VP of Marketing of Arteris @ DAC 2015
2:14

Addressing the #1 SoC development challenge with network on chip interconnect technology
19:25

Developing scalable SoC platforms with NoC interconnect technology
1:32

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