IP Subsystems for Deep Learning and Networking Applications
By Kalpesh Sanghvi, Technical Sales Manager IP & Platforms
Open-Silicon
June 24-28thth, DAC 2018, San Francisco, CA - USA
Posted on Thursday Jul. 12, 2018
2:24 Optimized ASIC Design Integrating High Speed SerDes
5:45 Smart City Gateway Platform
2:49 IP Solutions Targeted for Ultra High Bandwidth
4:37 Interlaken IP : Ultra Scalable, High Speed, Serial Link-Based Chip-to-Chip Interface
1:58 Product Standardization: Death to a Growing Market
10:03 Moving Towards Design-Lite for Innovation
05:49