DS3 eVerification Component

Features

• DS3 Generator / Monitor
• Generate/monitor a ANSI T1.107-1995 compliant DS3 signal.
• Corrupt any overhead bit on a per frame or a random basis. For example, the user can specify that 2% of DS3 frames have one of the F bits corrupted.
• Automatic framing algorithm will allow framing on a DS3 frame.
• Error reporting on any incorrect M or F bits on a per frame or a range of frames basis.
• DS3 gen./mon. interfaces with HDLC, ATM, PLCP gen./mon. to provide/verify a formatted payload.
• CP bits are automatically generated/monitored and can be corrupted.
• FEAC bits are sent as a 16-bit message.
• FEBE bits are sent as a 16-bit message.
• LAPD message is sent as a 16-bit message.
• Parity bit can be inverted on a per frame basis or over a range of frames.
• HDLC Generator / Monitor
• Supports Bit-Sync Mode as defined in RFC 1662 and ISO/IEC 3309.
• Packet length is programmable and can be random.
• Select between 32-bit FCS or no FCS.
• Insert a programmable number of bit errors in the FCS field.
• Corrupt a certain percentage of packets with a variable number of FCS errors.
• Select/verify the intergap fill to be a byte or a bit. Control the length of the intergap fill. For example, can specify that the intergap fill is a random number between 15 and 200 %91 1' s.
• ATM Cell Generator / Monitor
• Generate/verify ATM Cells as requested by the SPI-3 injector/collector.
• Generate/verify VPI, VCI, GFC, CLP, PTI and HEC fields.
• Optionally scramble/descramble (X**43) payload.
• Insert a user specified number of bit errors in the HEC field.
• Optionally corrupt a user specified percentage of ATM Cells with a variable number of HEC errors.
• PLCP Generator / Monitor
• Generate/verify A1, A2, POI and POH bytes.
• Insert a programmable number of bit errors in of the overhead bytes.
• Calculate and report B1 errors.
• Insert a programmable number of bit errors in the B1 field.
• Follow the trailer and extract the ATM cells.
• Insert programmable/random trailer stuffing.
• Cause programmable trailer errors.
• Payload Generator / Monitor
• Generate/verify payload for the HDLC, ATM and PLCP generators.
• Insert/verify header in the payload for in-band verification.
• Insert/verify destination address in the in-band header
• Insert/verify unique source address in the in-band header
• Insert/verify packet sequence number in in-band header.
• Monitor for dropped packets/cells on a channel using the sequence numbers in the in-band verification header.
• Generate/verify pattern for the payload - user can specify a fixed pattern or incrementing sequence.