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IEEE 1149.7 Compact JTAG (cJTAG) uVC
The cJTAG Universal Verification Component (uVC) verifies design blocks conforming to any of the six compliance levels defined by the IEEE standard, significantly reducing time to functional closure and increasing the quality of first silicon.
Originally proposed by the Mobile Industry Processor Interface (MIPI) Alliance, IEEE P1149.7™ extends IEEE 1149.1™ to support the needs of debug applications for products with complex digital circuitry, embedded software, and one or more CPUs. The standard addresses key challenges such as enhanced functionality for test access, reduced pin-count and improved power management.
The cJTAG uVC includes a metric-driven compliance management suite which accurately assesses the interoperability of IEEE 1149.7 IP in system topologies prior to integration. This design verification solution supports complete reuse of block-level environments in chip-level verification flows of IEEE 1149.7-enabled systems.
Originally proposed by the Mobile Industry Processor Interface (MIPI) Alliance, IEEE P1149.7™ extends IEEE 1149.1™ to support the needs of debug applications for products with complex digital circuitry, embedded software, and one or more CPUs. The standard addresses key challenges such as enhanced functionality for test access, reduced pin-count and improved power management.
The cJTAG uVC includes a metric-driven compliance management suite which accurately assesses the interoperability of IEEE 1149.7 IP in system topologies prior to integration. This design verification solution supports complete reuse of block-level environments in chip-level verification flows of IEEE 1149.7-enabled systems.
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