NVMe Verification IP
eInfochips has developed Verification IP and Validation Test Suite based on the latest available protocol standards (NVMe 1.2) from NVME.ORG body. The VIP and Test Suite aim to accelerate product design schedules for R&D teams working on the next gen products, while reducing the product and performance risks. The eInfochips NVMe VIP reduces verification environment setup effort for ASIC (Application Specific Integrated Circuit) and FPGA (Field Programmable Gate Array) design verification. While as the NVMe Post-Silicon Validation Test Suite enables test scenarios including, and beyond the ones defined by UNH-IOL (University of New Hampshire Interoperability Lab).
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