UART eVC - Fully documented, of the shelf component for Verisity's Specmean Elite functional verification environment

Silicon Interfaces’ UART eVC is a fully documented, off the shelf component for Verisity’s Specman EliteTM functional verification environment.
At the heart of every asynchronous serial system is the Universal Asynchronous Receiver/Transmitter (UART). The UART is responsible for implementing the asynchronous communication process as both a transmitter and a receiver (both encoding and decoding data frames). The UART not only controls the transfer of data, but the speed at which communication takes place.
The UART eVC is designed to have generation of data bits and testing of output data according to protocol. It also generates and tests data for error condition. It handles all the three modes: FIFO mode, Auto flow mode and Loop-back mode.

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