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Unipro + M-PHY VIP
The MIPI-Xactor supports verification of MIPI-based block-level design or SOC design. A DUT can be one of these:
1. UniPro controller stack
2. MPHY logic function
3. UFS application layer
The MIPI-Xactor BFMs and compliance tests are written in SystemVerilog. It has fast simulation performance and flexible programming user interface.
It’s a layered environment with a family of classes and programming methods:
1. Abstract data model for transactions and packets for easy usage
2. APIs via class methods or TLM-based ports
3. Randomizable SystemVerilog class-based sequences provides easy scenario generation
4. Native SystemVerilog functional covergroups/coverpoints
1. UniPro controller stack
2. MPHY logic function
3. UFS application layer
The MIPI-Xactor BFMs and compliance tests are written in SystemVerilog. It has fast simulation performance and flexible programming user interface.
It’s a layered environment with a family of classes and programming methods:
1. Abstract data model for transactions and packets for easy usage
2. APIs via class methods or TLM-based ports
3. Randomizable SystemVerilog class-based sequences provides easy scenario generation
4. Native SystemVerilog functional covergroups/coverpoints
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