USB 2.0 VMM SystemVerilog Verification IP
USB 2.0 VMM VIP is developed using the Synopsys VMM methodology that is used in dynamic simulation of USB 2.0 based design. Verification IP created according to the VMM methodology allows for easy "plug-and-play" use in VMM test benches.
The USB2.0 VIP uses SystemVerilog to create comprehensive verification environments using coveragedriven, constrained-random and assertion-based techniques. This VIP can work in a standalone mode i.e. can be plugged with any Function Controller with standard pinouts without disturbing the structure.
The VIP provides a fast and accurate way to simplify and speed-up the Device verification task. In a complex design process, verification may take up to 70% of the development time. USB 2.0 VMM SV VIP speeds up the verification process providing a compelling cost and time to market.
Silicon Interfaces ’USB 2.0 function controller is a highly integrated solution for USB applications and provides 480 Mb/s high speed USB interface. It is a single core solution incorporating USB 2.0 protocol operating in Link Layer of Open System Interconnect (OSI) which significantly reduces the time and cost of implementing complex USB 2.0 target system designs.
View USB 2.0 VMM SystemVerilog Verification IP full description to...
- see the entire USB 2.0 VMM SystemVerilog Verification IP datasheet
- get in contact with USB 2.0 VMM SystemVerilog Verification IP Supplier