Performances Estimation Metamodel for MDA Based SoC Design

by SAMYN Mickaël, LIFL
MEFTALI Samy, LIFL
DEKEYSER Jean-Luc, LIFL
Villeneuve d’Ascq, FRANCE

Abstract:

In this paper, we present a novel methodology permitting SoC design from high abstraction levels specification, based on the Model Driven Architecture approach (MDA).

In our design flow, performances criteria are integrated in both Platform independent metamodels (Application, architecture) and the platform dependent model (TLM). This could help designers to reduce dramatically the design time, especially in the mapping and simulation phases.

1. Introduction

Because of the vast scope of the encountered problems, of the quick evolution of the architectures, we observe a very great diversity in terms of systems description languages. Ten years ago each new proposed model led to the implementation of this model in a new language or at least in an extension of a standard language. Thus a variety of dialects were born, without relieving the programmer of the usual constraints of code development. Portability of an application from one language to another (a new one for example) increases the workload of the programmer. This drawback is also true for the development of embedded applications. It is even worse, because the number of abstraction levels has to be added to the diversity of the languages. It is essential to associate a target hardware architecture model to the application specification model, and to introduce as well a relationship between them. These two models are practically always different; they are often expressed in two different languages.

From this experience, one can derive some principles for the design of the next generation of environments for embedded application development:

• To refrain from designing programming languages to express the two different models, application and hardware architecture.
• To profit from all the new systems dedicated to simulation or synthesis without having to reformalize these two models.
• To use a single modelling environment possibly supporting a visual specification.
• To benefit from standard formats for exchange and storage.
• To be able to express transformation rules from model to model. Possibly the transformation tools could be generated automatically from this expression.

We believe that the Model Driven Architecture [7] [8] can enable us to propose a new method of system design respecting these principles. Indeed, it is based on the common UML modelling language to model all kinds of artefacts. The clear separation between the models and the platforms makes it easy to switch to a new technology while re-using the old designs. This may even be done automatically provided the right tools. The MDA is the OMG proposed approach for system development. It primarily focuses on software development, but can be applied to any system development. The MDA is based on models describing the systems to be built. A system description is made of numerous models, each model representing a different level of abstraction. The modelled system can be deployed on one or more platforms via automatic model to model transformations.

In the Figure 1, our MDA based design flow is presented. This methodology is implemented in a tool called Gaspard [2], [3]. In fact, starting from a high level PIM models of an application and an architecture respecting the defined metamodels, the application is mapped on the architecture components. Finally, we automatically generate a PSM model using SystemC as a target language.

Figure 1: MDA based design flow in Gaspard tool

This approach permits to model and to generate executable SystemC easily descriptions for signal processing application, but all the performances estimations can not be realized before the mapping (architecture exploration) and the code generation.

This paper is organized as follow: in section 2 we give a review of related work on distributed simulation. The different steps of our methodology are presented with details in section 3. We conclude this paper in the section 4.

2. Related work

We can find very few works in the literature that starts the system design from a very high abstraction level (UML for example) and generates automatically the SoC specification in a system level description language (SystemC) for a given class of applications.

One of the most significant works that we seen is SLOOP [9] (System Level design with Object-Oriented Process). It is an UML2 approach for hardware/software co-design, based on four main models. The first one is called “conceptual model” and it describes clients’ requirements. Above, there are two other models: the functional model, which describes the application and the communication between processes; the architecture model describes the hardware resources. And finally, after the mapping phase, the performance model is used to see whatever the obtained performances are suitable with the conceptual model. SLOOP's approach seems to be complete and coherent, but with the used models data parallelism can not be expressed, and the hierarchy can not be modelled. This is unfortunately a big restriction for intensive signal processing specific SoC design. To our knowledge, this environment do not integrates any performances estimation in the metamodels.

Thus, this can be very time consuming in some cases when the designer see that the specification do not much the needed performances. So the objective of this work is to integrate several performances estimation parameters in our metamodels, in order to be able to have as much as possible indications on the system performances during the architecture exploration phase and before the code generation.

MILAN [1], [6] is an academic tool University of Southern California. It is a model based extensible framework that facilitates rapid, multigranular performance evaluation of a large class of embedded systems, by seamlessly integrating different widely used simulators into a unified environment. MILAN provides a formal paradigm for specification of structural and behavioural aspects of embedded systems, an integrated model-based approach [11], and a unified software environment for system design and simulation.

In this environment, the application is modelled, at a high abstraction level, using a visual editor looking like Ptolemy 2. The architecture is also modelled in the same way, and then a SystemC specification can be generated. The main disadvantage of MILAN is that the application metamodel is composed mainly by some very low level components. This makes the modelling of an industrial size ISP application very tedious, and also limits the flexibility of the SystemC met model. MILAN permits performances estimation only at low abstraction levels. Thus this can be very time consuming for complex design projects.

Several other system design environments as in [4], [5] permit many performances estimations, but at low abstraction levels. Thy also unfortunately do not integrate these estimations in structured metamodels to allow easy automation by using the MDA approach.

3. Methodology

3.1. Performances criteria

We defined mainly four criteria for our performances estimation:

• power consumption
• execution time
• area
• cost

The power consumption defines the amount of energy consumed by a given component during the execution of the application on the architecture. The execution time is an estimation of the execution of each task on each active component in the architecture as a processor or a DSP for instance. The area is a kind of estimation of the final circuit area. Finally, the cost criterion is the cost of the obtained system on chip (mainly the cost of the architecture components as IPs).

Even, the last two criteria can be evaluated during the modelling phase of the system, it could be very interesting to use them in a refinement loop (architecture exploration for instance). In fact, for identical power consumption and executions times, it could be more interesting for the designer to choose the architecture giving the lowest cost or the smallest area dependently of its constraints.

3.2. Performance representation in the TLM Metamodel

We integrated the performance criteria defined in the previous section to the TLM metamodel presented in [10]. This later is based mainly on three hardware concepts: memories, processors and interconnects. Thus each concept of the metamodel is annotated with a subset of criteria. The association concept-criteria is as follow:

• Memory: we associated to the memory concept three performance estimation criteria. The area, because in the modern applications of signal and image processing, memories occupy more and more amount of the total area of chips. In fact, according to ITRS, it will represent more than 90% of chips area in 2010. The second criterion is the power consumption. This is very significant especially in the case of application handling highly dependant data, or containing for example several cache levels. The last criterion is the cost which is a consequence of the two first criteria.
• Processor: as for the memories, the power consumption is a very important criterion for processors. In fact, computations need power, and also processors consume power even being idle. The area is also important because of the huge differences of the silicon area and gates needed for different processors. Finally, the cost is also a determinant criterion in the case of processors.
• Interconnect: as explained in [10], we mean by interconnect: buses, point-to-point connections and networks on chip (NoC). We believe that the most important criteria for this kind of components are the cost and the area. Thus in the case of buses for example, when the SoC contains a lot of IPs connected to the bus, the cost of the circuits will close to the cost the silicon where the bus is implemented.

In the Figure 2, we can see an overview of the main concepts defining the TLM metamodel. In particular, we can see that the architectural concepts of this metamodel owned some performances criteria. In fact, Memory and Interconnect concepts owned the whole criteria as attribute whereas Processor only have three of this criteria and a reference to a concept call RunningPerformance. We have defined these criteria inside architectural concept to express the size taken by these concepts on a SoC, and the power consumption of the system when it is in an idle state. The figure 3, show the utility of the RunningPerformance concepts. This concept is used to express the power consumption and the time used to run a particular ComputationModule on a particular Processor.

Click to enlarge

Figure 2: TLM metamodel for intensive signal processing applications

Click to enlarge

Figure 3: Running performance class in the metamodel

3.3. Using performance estimation metamodels in architectures exploration

As explained in the previous sections our application and architecture metamodels are annotated respectively with tasks execution times and hardware performances criteria. So, in the mapping step of our design flow, values of each one of our performances criteria are automatically performed for each marring configuration of the application on the architecture.

Of course, this do not give to designers very accurate estimations on performances of the final circuit, but it gives a kind of worst cases estimations (upper bounds). This permits to eliminate early in the design flow, in a fast and automatic way, many mapping configurations not satisfying the needed performances for one or several criteria.

The metamodel on which we focused in this paper (TLM metamodel), arrives, in the design flow, later than the application and architecture ones. It permits to generate an executable (simulation) specification of the applications. Thus, within this metamodel, performance estimations are used as simulation results. This gives to designers more accurate information on different criteria, and thus permits more or less feedbacks to: the application description, architecture model or the mapping step.

Note. The details on all the elements defined in our metamodels do not constitute the object of this paper. They are explained in [10].

4. Conclusion

We presented in this paper an MDA based SoC design methodology allowing code generation for intensive signal processing specific systems. Our metamodels integrate all the necessary concepts for specifying this kind of applications. Each concept is annotated with some performances estimation criteria that we defined. This approach allows an approximation of multi criteria performances estimation at high abstraction levels. This metamodel is integrated in GASPARD tool and used in the Y design flow for the platform specific (PIM) code generation.

References

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[9] Qiang Zhu, Akio Matsuda, Shinya Kuwamura, Tsuneo Nakata, and Minoru Shoji. "An object-oriented design process for system-onchip using UML". In the 15th international symposium on System Synthesis, Kyoto, Japan, 2002.

[10] Mickaël Samyn, Samy Meftali and Jean-Luc Dekeyser. “MDA based, SystemC code generation, applied to intensive signal processing applications”. In FDL04, Lille, France, September 2004. [11] Sumit Mohanty and Viktor K. Prasanna. “Rapid system-level performance evaluation and optimization for application mapping onto soc architectures”. In 15th IEEE International ASIC/SOC Conference, New York, USA, 2002.