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Forest Semiconductor
Gigabit Ethernet PHY (1000Base-T)
FortifyIQ, Inc.
FortifyIQ Post-Quantum ML-DSA Signature-Verification SW Library configurable: ultra-compact or high performance
Alphacore, Inc.
5GHz to 13.5GHz Phase Locked Loop (PLL) IP Block GFFDX 22nm FDSOI
SmartDV
OpenGMSL Root IP
Cassia.ai
Gaussian Error Linear Unit (GELU)

Blogs

UALink over UCIe 3.0: Maximizing Performance for Chiplet-based Designs
Siemens EDA
Mundru Sriram Bhaskar Teja
Siemens EDA
From Bug Hunting to Engineering Methodology: Lessons from AI-Driven Development
Arteris
Alexandre Manuel and Julia Baucher
Arteris
How AI can help defend against future quantum attacks
PQShield
PQShield
Can Remote Equipment Monitoring Move Beyond Alerts to Autonomous Action?
MosChip Technologies, USA
Darshil Shah
MosChip Technologies, USA
Trust Continuity: Securing SoCs and Chiplets from Design to Deployment and Beyond
Secure-IC
Secure-IC
Why Hardware Root of Trust Matters
Xiphera Ltd
Reija Stenroos
Xiphera Ltd
JPEG XS in MXF: How China's New UHD Broadcasting Standard Puts Visually Lossless Compression at the Core of 8K Delivery
intoPIX
intoPIX
KiviPQC-DSA Tiny vs Fast: Area or performance for hardware ML-DSA
KiviCore
KiviCore
One Processor, One Toolchain
Quadric
Lee Vick
Quadric
UFS 5.0: Redefining Storage Performance for the AI Era
Arasan Chip Systems Inc.
Arasan Chip Systems Inc.
Chiplets Are Sparking an IC Design Revolution
Alistair Winning, Mouser Electronics
Accelerating Physical AI Through Cadence Silicon Solutions and Arm Total Design
Cadence Design Systems, Inc.
Mick Posner
Cadence Design Systems, Inc.

Articles

Directory-Based Coherency at Scale: From 8 Cores to 256 Agents
Signature IP Corporation
Signature IP Corporation
Clock Domain Crossing Sign-Off with Microarchitecture Analysis: 20X Better Precision
Real Intent
Vikas Sachdeva, Sr. Director
Real Intent
Coherent vs Non-Coherent Fabrics: Choosing the Right NoC for Your SoC
Signature IP Corporation
Signature IP Corporation
Multiple neuromorphic chips, one grid, no new middleware
BrainChip
Nikunj Kotecha
BrainChip
Harnessing the power of AMBA CHI: The Protocol Powering Modern CPU Clusters
Signature IP Corporation
Signature IP Corporation
Why Open-Source Software Is Essential in the Software-Defined Vehicle Era
Renesas
Hisao Munakata
Renesas
Detect, Diagnose, and Debug using Sensors and Functional Monitoring
Siemens EDA
Siemens EDA and Movellus
Siemens EDA
Practical AI Silicon on Mainstream Node using LPDDR
OPENEDGES Technology, Inc.
OPENEDGES Technology, Inc.
From Specification to Silicon: Using PUFrt to Address Caliptra Root of Trust Integration Challenges
eMemory Technology Inc.
eMemory Technology Inc.
Cache Coherency 101: Why It Matters in Multi-Core SoCs
Signature IP Corporation
Signature IP Corporation
Why SoC Interconnects Have Outgrown the Bus
Signature IP Corporation
SignatureIP Engineering Team
Signature IP Corporation
High-Speed SerDes Design: Architecture, Equalization, and CDR Circuits
MosChip Technologies, USA
Vivek Babu Avuri
MosChip Technologies, USA
Asic Technology
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