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Qualitas Semiconductor
PCIe 6.0/5.0 PHY in 8nm, 5nm, 4nm (8LPU, SF5A, SF4X)
Synopsys, Inc.
200G MACsec HPC Security Module
INTERA
EAGLE Cognit Edge AI Accelerator IP Low Power Low Latency TinyML Neuromorphic
Shikino High-Tech Co., Ltd.
JPEG XL series
AiM Future, Inc.
GAIA Edge AI/ML Accelerator IP Series

Blogs

Q&A: What Real-World Projects Reveal About Multi-Die Design
Synopsys, Inc.
Greg Sorber
Synopsys, Inc.
When the Partner Doesn’t Fit: What Really Goes Wrong in VLSI Design Engagements
SignOff Semiconductors
SignOff Semiconductors
How to Use AI Agents to Streamline Code Reviews
Arteris
Rodolphe Gabriel and Julia Baucher
Arteris
Inside the Silicon: Analog Bits N2P2 Test Chip
Analog Bits Inc.
Analog Bits Inc.
Why Is Manufacturing Data Not Ready to Deliver Manufacturing AI Insights?
MosChip Technologies, USA
Darshil Shah
MosChip Technologies, USA
Multiply Less: Rethinking the Dot Product for Low-Bit Edge AI
BrainChip
Jonathan Tapson
BrainChip
Q&A: Bringing Co-Packaged Optics to AI Infrastructure
Synopsys, Inc.
Greg Sorber
Synopsys, Inc.
Secure Boot for embedded Linux on Efinix Ti375C529: Getting started with KiviBoot-Linux
KiviCore
KiviCore
Democratizing Chip Design: Empowering the Next Generation of Engineers with RISC-V Expertise
Maven Silicon
Maven Silicon
Strategies for FPGA to ASIC Migration for Product Teams
MosChip Technologies, USA
Jigar Mori
MosChip Technologies, USA
Are We Ready to Tape Out?” Notes From the Meeting Every ASIC Team Has
SignOff Semiconductors
SignOff Semiconductors
From Hardware to Application: Understanding the Role of HAL in Embedded Platforms
MosChip Technologies, USA
Pradeep Kumar Chinthala
MosChip Technologies, USA

Articles

Microarchitectural integrity Sign-Off: Finding Hard-to-Detect Bugs at their Source
Real Intent
Lisa Piper, Sr. Director
Real Intent
Breaking the Memory Bottleneck in AI and HPC SoCs
Synopsys, Inc.
Rahul Thukral, Niranjan Behera
Synopsys, Inc.
Directory-Based Coherency at Scale: From 8 Cores to 256 Agents
Signature IP Corporation
Signature IP Corporation
Clock Domain Crossing Sign-Off with Microarchitecture Analysis: 20X Better Precision
Real Intent
Vikas Sachdeva, Sr. Director
Real Intent
Coherent vs Non-Coherent Fabrics: Choosing the Right NoC for Your SoC
Signature IP Corporation
Signature IP Corporation
Multiple neuromorphic chips, one grid, no new middleware
BrainChip
Nikunj Kotecha
BrainChip
Harnessing the power of AMBA CHI: The Protocol Powering Modern CPU Clusters
Signature IP Corporation
Signature IP Corporation
Why Open-Source Software Is Essential in the Software-Defined Vehicle Era
Renesas
Hisao Munakata
Renesas
Detect, Diagnose, and Debug using Sensors and Functional Monitoring
Siemens EDA
Siemens EDA and Movellus
Siemens EDA
Practical AI Silicon on Mainstream Node using LPDDR
OPENEDGES Technology, Inc.
OPENEDGES Technology, Inc.
From Specification to Silicon: Using PUFrt to Address Caliptra Root of Trust Integration Challenges
eMemory Technology Inc.
eMemory Technology Inc.
Cache Coherency 101: Why It Matters in Multi-Core SoCs
Signature IP Corporation
Signature IP Corporation
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Asic Technology
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Today on Design And Reuse

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