High-level parallel programming model simplifies multicore design

By Michael D. McCool and Stefanus Du Toit
March 26, 2008 -- edadesignline.com

Processors recently have added explicit parallelism in the form of multiple cores, and processor road maps are showing the number of cores increasing exponentially over time. This is in addition to existing per-core vector instructions, which also require parallelism. The good news is that processors will continue to scale exponentially in performance. The bad news is that as processors are no longer significantly scaling their clock rate, software apps that are not parallelized will not benefit.

Use of a high-level programming model greatly simplifies software development for multicore processors, including heterogeneous multicore devices. Most important, this approach does not sacrifice performance if the platform implementation includes modern automatic code optimization strategies.

Given the volatility of current processor designs, it is also worthwhile to consider the importance of portable, high-level parallel programming models for future-proofing software development. Portability also allows easy migration of code among processor designs, including handheld, mobile, desktop and server processors.

Heterogeneous designs in which some cores are specialized for some tasks are now being considered. This leads to greater power/performance efficiencies. However, the trend potentially complicates programming, since different cores in the same machine may have different instruction set architectures and require different approaches to optimization.

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