How to analyze and reduce power using Libero IDE

By Fred Wickersham, Julien Dunoyer, and Kristofer Vorwerk, Actel
pldesignline.com (August 13, 2008)

The importance of power reduction in electronic systems

With the continued proliferation of electronic systems spanning simple gadgets to complex systems that visibly or invisibly support every facet of our daily lives, today's electronic systems must be designed ground up as "power conscious" systems. This includes semiconductors as well as other active components in the design.

The generation of electricity required to power today's electronic systems contributes to a surprisingly high proportion of the greenhouse gasses associated with global warming, plus battery powered systems are faced with demands for feature rich portable devices that are smaller, cheaper, and have long battery lives. Low power systems support the green environment movement by consuming less energy, plus can offer lower system costs, smaller physical sizes, and longer battery life in portable applications.

Portable applications for consumer and industrial products are growing quickly. This growth, when combined with time to market pressures and increasing complexity, makes programmable logic a desirable fit if the device can meet the power specifications of the system.

Low power programmable logic is an enabling technology that services this growing demand, and nonvolatile Flash-based FPGAs from Actel are ideally suited for portable low power applications. While Actel FPGAs inherently use less power than competing SRAM-based technologies, the power consumption of Actel flash-based designs can be further reduced by using the wide array of features in the Libero IDE tool suite.

Actel's Libero Integrated Design Environment (IDE) provides a comprehensive tool suite for designing with Actel's many FPGA products. Libero provides start-to-finish tools and design flow guidance that enable users to meet tough design requirements and complete FPGA designs timely, including state of the art synthesis, simulation, physical and timing constraint management, layout, design analysis, and device programming.

Key to meeting the low power design specifications for a given design is the availability of automatic power reduction capabilities as well as power analysis features that can quickly pinpoint sources of power consumption within the design. Libero IDE includes a very powerful set of features for creating a physical layout which is power optimized, as well as tools that in great detail analyze the design to identify areas of power consumption such that the FPGA designer can modify these areas accordingly in an effort to minimize the discrete and overall power consumption of the design.

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