Using yesterday's methodologies to design today's multi-FPGA systems is a recipe for disaster

By Bruce Riggins, Taray Inc.
Programmable Logic DesignLine (01/07/09, 01:20:00 PM EST)

The demand to meet multiple, sometimes conflicting, constraints means it's a wonder that FPGA and PCB designers aren't fitted for straightjackets by the time the board finally tapes out.

A well-known episode of the popular 1960's Star Trek TV series was titled "The Trouble with Tribbles." Zipping through some distance corner of the universe at warp 10, the Enterprise was mysteriously overrun by fuzzy little creatures possessing a couple of unreedeming qualities: a voracious appetite and a propensity to reproduce uncontrollably (in McCoy's words, "They are born pregnant").

Looking at the growth of FPGA pin counts and device complexity over the past 15 years, it's easy to view them as modern-day, high-tech Tribbles. And, like Tribbles, solutions for dealing with them, at the board level, are proving just as illusive.

Unfortunately, designers aren't Captain Kirk and there are no sacrificial extras that can be killed off in an attempt to resolve the crisis (unless you consider perhaps the managers that produce unrealistic schedules in the first place). While engineers can't yet beam the final design to their desktop with just seconds to spare, there are products that can significantly reduce the torment associated with FPGA-based systems design while increasing the design team's overall productivity.

This article explores the tools, techniques, and problems that designers struggle with when developing FPGA-based systems and, using a couple of real-world examples, attempts to offer solutions.

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